Altera 5ASXBB3D6F31C6N

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Normaler Preis Dhs. 355,870.06
Normaler Preis Dhs. 374,600.06 Verkaufspreis Dhs. 355,870.06
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Product attributes Property Value
Manufacturer Altera
Product Series Arria V SX
Packaging | Tray
Architecture MCU, FPGA
Core Processor Dual ARM® Cortex®-A9 MPCore™ with CoreSight™
Flash Size -
RAM Size 64KB
Peripherals DMA, POR, WDT
Connectivity EBI/EMI, Ethernet, I2C, MMC/SD/SDIO, SPI, UART/USART, USB OTG
Speed 700MHz
Primary Attributes FPGA - 350K Logic Elements
Operating Temperature 0°C ~ 85°C (TJ)
Grade -
Qualification -
Package / Case 896-BBGA, FCBGA
Supplier Device Package 896-FBGA, FC (31x31)

Altera Arria V SX FPGA System-on-Chip - 5ASXBB3D6F31C6N

The Altera Arria V SX 5ASXBB3D6F31C6N is a high-performance FPGA System-on-Chip (SoC) combining dual ARM® Cortex®-A9 MPCore™ processors with CoreSight™ debug technology and 350,000 logic elements of FPGA fabric. Engineered for demanding industrial, automotive, aerospace, communications, and edge computing applications requiring both processing power and programmable logic flexibility.

Key Features & Benefits

  • Dual ARM Cortex-A9 MPCore Processors: 700MHz processing power with CoreSight debug capabilities for real-time embedded applications
  • 350K Logic Elements: Extensive FPGA fabric for custom hardware acceleration, signal processing, and protocol implementation
  • Rich Connectivity: Integrated Ethernet, USB OTG, SPI, I2C, UART/USART, MMC/SD/SDIO, and EBI/EMI interfaces
  • Industrial Temperature Range: Reliable operation from 0°C to 85°C (junction temperature) for harsh environments
  • Advanced Peripherals: DMA, Power-On Reset (POR), and Watchdog Timer (WDT) for robust system design
  • Compact 896-FBGA Package: 31x31mm flip-chip ball grid array for space-constrained designs

Ideal Applications

This SoC is perfectly suited for industrial automation controllers, automotive ADAS systems, aerospace avionics, 5G/communications infrastructure, machine vision systems, motor control, and edge AI/ML inference platforms where deterministic real-time processing meets flexible hardware acceleration requirements.

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